[oval run] =================================================
[oval run] USER : chamont
[oval run] HOST : lxplus001.cern.ch
[oval run] TEST_OUTPUT_FILE = gsfElectronHistos.root
[oval run] DBS_RELEASE = CMSSW_3_1_0_pre7
[oval run] DBS_LIKE = *IDEAL_31X_v1*-RECO
[oval run] VAL_NEW_RELEASE = 310pre7
[oval run] VAL_REF_RELEASE = 310pre6
[oval run] DBS_SAMPLE = RelValQCD_Pt_80_120
[oval run] VAL_ANALYZER = GsfElectronFakeAnalyzer
[oval run] run tool: scram
[oval run] final instruction: ./dbs_discovery.py
[oval run] =================================================

/store/relval/CMSSW_3_1_0_pre7/RelValQCD_Pt_80_120/GEN-SIM-RECO/IDEAL_31X_v1/0004/F8907C88-E641-DE11-8FBF-001D09F292D1.root
/store/relval/CMSSW_3_1_0_pre7/RelValQCD_Pt_80_120/GEN-SIM-RECO/IDEAL_31X_v1/0004/E46A69B4-AD41-DE11-99E2-001617C3B76A.root
/store/relval/CMSSW_3_1_0_pre7/RelValQCD_Pt_80_120/GEN-SIM-RECO/IDEAL_31X_v1/0004/D8C56918-AA41-DE11-BB40-001D09F2AF1E.root
/store/relval/CMSSW_3_1_0_pre7/RelValQCD_Pt_80_120/GEN-SIM-RECO/IDEAL_31X_v1/0004/B29B76F0-AB41-DE11-903F-0019B9F730D2.root
/store/relval/CMSSW_3_1_0_pre7/RelValQCD_Pt_80_120/GEN-SIM-RECO/IDEAL_31X_v1/0004/74271B57-AD41-DE11-B233-000423D98B08.root
/store/relval/CMSSW_3_1_0_pre7/RelValQCD_Pt_80_120/GEN-SIM-RECO/IDEAL_31X_v1/0004/307BD5EC-AC41-DE11-A2DE-0019B9F7310E.root

[oval run] ==========================================
[oval run] result: OK
[oval run] ==========================================