1 input : AMPLITUDE FILTER_output[i] 18 bits
1 output : PEAK FINDER_output[i] 1 bit
Makes two comparisons in parallel :
if
{AMPLITUDE FILTER_output[i-1] greater than AMPLITUDE FILTER_output[i-2]} and
{AMPLITUDE FILTER_output[i-1] greater than AMPLITUDE FILTER_output[i]} then PEAK FINDER_output[i] = 1
else PEAK FINDER_output[i] = 0
Corresponding VHDL code