#!/usr/bin/env python2
# -*- coding: utf-8 -*-
#
# Copyright 2012-2017 Frédéric Magniette, Miguel Rubio-Roy
# This file is part of Pyrame.
#
# Pyrame is free software: you can redistribute it and/or modify
# it under the terms of the GNU Lesser General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# Pyrame is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public License
# along with Pyrame. If not, see <http://www.gnu.org/licenses/>
import pools,common_roc
spiroc2d_pool=pools.pool("spiroc2d")
spiroc2d_bs_length=1186
def init():
common_roc.nb_chans=36
#************************* BITSTREAM MANIPULATION FUNCTIONS ***************
# **************************************************************************
# trigger threshold
# **************************************************************************
def extract_gtrigger(spiroc2d):
return str(int(spiroc2d["bitstream_bin"][245:255][::-1],2))
def set_gtrigger_reg(spiroc2d,value):
if value!="undef":
return common_roc.apply_inv_mask(spiroc2d,245,common_roc.split_bin(int(value),10))
return 1,"ok"
[docs]def set_gtrigger_spiroc2d(spiroc2d_id,value):
"set the trigger threshold of a spiroc2d. *value* is 10-bit integer"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_gtrigger,set_gtrigger_reg,"gtrigger",value)
# **************************************************************************
# DAC2 gain selection
# **************************************************************************
def extract_dac2_gain_select(spiroc2d,xml_value=True):
return str(int(spiroc2d["bitstream_bin"][235:245][::-1],2))
def set_dac2_gain_select_reg(spiroc2d,value):
if value!="undef":
return common_roc.apply_inv_mask(spiroc2d,235,common_roc.split_bin(int(value),10))
return 1,"ok"
[docs]def set_dac2_gain_select_spiroc2d(spiroc2d_id,value):
"set the trigger threshold of a spiroc2d. *value* is 10-bit integer"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_dac2_gain_select,set_dac2_gain_select_reg,"dac2_gain_select",value)
# **************************************************************************
# chipid
# **************************************************************************
def extract_chipid(spiroc2d):
return str(int(spiroc2d["bitstream_bin"][1160:1168],2))
[docs]def set_chipid(spiroc2d_id,spiroc2d):
"set the chipid of a spiroc2d chip on its bitstream"
idbin=common_roc.split_bin(common_roc.bin2gray(int(spiroc2d["chipid"])),8)
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_chipid,common_roc.apply_mask,"undef",1160,idbin)
[docs]def set_chipid_param_spiroc2d(spiroc2d_id,chipid):
"set the chipid of a spiroc2d chip on the pool"
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
if chipid!="undef":
spiroc2d["chipid"]=chipid
return 1,"ok"
[docs]def get_chipid_spiroc2d(spiroc2d_id):
"get the chipid of a spiroc2d"
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
return 1,"chipid=%s"%(spiroc2d["chipid"])
# **************************************************************************
# triggers
# **************************************************************************
def extract_allow_trig_chans(spiroc2d):
return common_roc.extract_bit_chans(spiroc2d,190,1,0,False)
def allow_trig(spiroc2d,chan):
return common_roc.apply_mask(spiroc2d,190+chan,common_roc.split_bin(0,1))
[docs]def allow_trig_chans_spiroc2d(spiroc2d_id,chans):
"allow trigger on channels. *chans* is a list of channels"
retcode,res=common_roc.apply_to_chans(spiroc2d_pool,spiroc2d_id,chans,extract_allow_trig_chans,allow_trig,"allow_trig_chans")
if retcode==0:
return 0,res
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
spiroc2d["disallow_trig_chans"]=extract_disallow_trig_chans(spiroc2d)
return 1,"ok"
# **************************************************************************
def extract_disallow_trig_chans(spiroc2d):
return common_roc.extract_bit_chans(spiroc2d,190,1,1,False)
def disallow_trig(spiroc2d,chan):
return common_roc.apply_mask(spiroc2d,190+chan,common_roc.split_bin(1,1))
[docs]def disallow_trig_chans_spiroc2d(spiroc2d_id,chans):
"disallow trigger on channels. *chans* is a list of channels"
retcode,res=common_roc.apply_to_chans(spiroc2d_pool,spiroc2d_id,chans,extract_disallow_trig_chans,disallow_trig,"disallow_trig_chans")
if retcode==0:
return 0,res
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
spiroc2d["allow_trig_chans"]=extract_allow_trig_chans(spiroc2d)
return 1,"ok"
# **************************************************************************
# TDC External
# **************************************************************************
def extract_tdc_ext(spiroc2d):
return spiroc2d["bitstream_bin"][1182:1183]
[docs]def set_tdc_ext_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) flag_tdc_ext signal"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_tdc_ext,common_roc.on_off_bit,"tdc_ext",1182,value)
# **************************************************************************
# Input 8-bit DAC
# **************************************************************************
def extract_input_dac(spiroc2d,chan):
return str(int(spiroc2d["bitstream_bin"][825+9*(35-chan)+1:825+9*(35-chan)+1+8][::-1],2))
def extract_input_dac_spiroc2d(spiroc2d_id,chan):
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
return 1,extract_input_dac(spiroc2d,int(chan))
def set_input_dac(spiroc2d,chan,value):
if value!="undef":
return common_roc.apply_inv_mask(spiroc2d,825+9*(35-chan)+1,common_roc.split_bin(int(value),8))
return 1,"ok"
# **************************************************************************
def extract_enable_input_dac_chans(spiroc2d):
return common_roc.extract_bit_chans(spiroc2d,825,9,1)
def enable_input_dac(spiroc2d,chan):
return common_roc.apply_mask(spiroc2d,825+9*(35-chan),common_roc.split_bin(1,1))
# **************************************************************************
def extract_disable_input_dac_chans(spiroc2d):
return common_roc.extract_bit_chans(spiroc2d,825,9,0)
def disable_input_dac(spiroc2d,chan):
return common_roc.apply_mask(spiroc2d,825+9*(35-chan),common_roc.split_bin(0,1))
# **************************************************************************
# preamps
# **************************************************************************
def extract_hg_preamp(spiroc2d,chan):
return str(int(spiroc2d["bitstream_bin"][279+15*(35-chan)+9:279+15*(35-chan)+9+6][::-1],2))
def extract_hg_preamp_spiroc2d(spiroc2d_id,chan):
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
return 1,extract_hg_preamp(spiroc2d,int(chan))
def set_hg_preamp(spiroc2d,chan,value):
if value!="undef":
return common_roc.apply_inv_mask(spiroc2d,279+15*(35-chan)+9,common_roc.split_bin(int(value),6))
return 1,"ok"
[docs]def set_hg_preamp_chans_spiroc2d(spiroc2d_id,chans,value):
"set high gain (HG) of preamp of channels. *value* is a 6-bit integer. *chans* is a list of channels"
return common_roc.apply_to_chans(spiroc2d_pool,spiroc2d_id,chans,extract_hg_preamp,set_hg_preamp,"undef",value)
# **************************************************************************
def extract_lg_preamp(spiroc2d,chan):
return str(int(spiroc2d["bitstream_bin"][279+15*(35-chan)+3:279+15*(35-chan)+3+6][::-1],2))
def extract_lg_preamp_spiroc2d(spiroc2d_id,chan):
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
return 1,extract_lg_preamp(spiroc2d,int(chan))
def set_lg_preamp(spiroc2d,chan,value):
if value!="undef":
return common_roc.apply_inv_mask(spiroc2d,279+15*(35-chan)+3,common_roc.split_bin(int(value),6))
return 1,"ok"
[docs]def set_lg_preamp_chans_spiroc2d(spiroc2d_id,chans,value):
"set high gain (HG) of preamp of channels. *value* is a 6-bit integer. *chans* is a list of channels"
return common_roc.apply_to_chans(spiroc2d_pool,spiroc2d_id,chans,extract_lg_preamp,set_lg_preamp,"undef",value)
# **************************************************************************
def extract_enable_preamp_chans(spiroc2d):
return common_roc.extract_bit_chans(spiroc2d,279,15,0)
def enable_preamp_chan(spiroc2d,chan):
return common_roc.apply_mask(spiroc2d,279+15*(35-chan),common_roc.split_bin(0,1))
[docs]def enable_preamp_chans_spiroc2d(spiroc2d_id,chans):
"enable preamp of channels. *chans* is a list of channels"
retcode,res=common_roc.apply_to_chans(spiroc2d_pool,spiroc2d_id,chans,extract_enable_preamp_chans,enable_preamp_chan,"enable_preamp_chans")
if retcode==0:
return 0,res
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
spiroc2d["disable_preamp_chans"]=extract_disable_preamp_chans(spiroc2d)
return 1,"ok"
# **************************************************************************
def extract_disable_preamp_chans(spiroc2d):
return common_roc.extract_bit_chans(spiroc2d,279,15,1)
def disable_preamp_chan(spiroc2d,chan):
return common_roc.apply_mask(spiroc2d,279+15*(35-chan),common_roc.split_bin(1,1))
[docs]def disable_preamp_chans_spiroc2d(spiroc2d_id,chans):
"disable preamp of channels. *chans* is a list of channels"
retcode,res=common_roc.apply_to_chans(spiroc2d_pool,spiroc2d_id,chans,extract_disable_preamp_chans,disable_preamp_chan,"disable_preamp_chans")
if retcode==0:
return 0,res
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
spiroc2d["enable_preamp_chans"]=extract_enable_preamp_chans(spiroc2d)
return 1,"ok"
# **************************************************************************
# Enable/disable backup SCA
# **************************************************************************
def extract_bak_sca(spiroc2d):
return spiroc2d["bitstream_bin"][265:266]
[docs]def set_bak_sca_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) backup SCA"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_bak_sca,common_roc.on_off_bit,"bak_sca",265,value)
# **************************************************************************
# Delay for trigger signals
# **************************************************************************
def extract_trigger_delay(spiroc2d):
return str(int(spiroc2d["bitstream_bin"][180:188][::-1],2))
def set_trigger_delay_reg(spiroc2d,value):
if value!="undef":
return common_roc.apply_inv_mask(spiroc2d,180,common_roc.split_bin(int(value),8))
return 1,"ok"
[docs]def set_trigger_delay_spiroc2d(spiroc2d_id,value):
"set the delay for the trigger signals. *value* is a 6-bit integer"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_trigger_delay,set_trigger_delay_reg,"trigger_delay",value)
# **************************************************************************
# Discriminator DAC threshold adjustment
# **************************************************************************
def extract_discri_dac(spiroc2d,chan):
return str(int(spiroc2d["bitstream_bin"][36+4*chan:36+4*chan+4],2))
def extract_discri_dac_spiroc2d(spiroc2d_id,chan):
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
return 1,extract_discri_dac(spiroc2d,int(chan))
def set_discri_dac(spiroc2d,chan,value):
if value!="undef":
return common_roc.apply_mask(spiroc2d,36+4*chan,common_roc.split_bin(int(value),4))
return 1,"ok"
[docs]def set_discri_dac_chans_spiroc2d(spiroc2d_id,chans,value):
"set discriminator DAC threshold of channels. *value* is a 4-bit integer. *chans* is a list of channels"
return common_roc.apply_to_chans(spiroc2d_pool,spiroc2d_id,chans,extract_discri_dac,set_discri_dac,"undef",value)
# **************************************************************************
# Delay for valid_hold signals
# **************************************************************************
def extract_valid_hold_delay(spiroc2d):
return str(int(spiroc2d["bitstream_bin"][22:28][::-1],2))
def set_valid_hold_delay_reg(spiroc2d,value):
if value!="undef":
return common_roc.apply_inv_mask(spiroc2d,22,common_roc.split_bin(int(value),6))
return 1,"ok"
[docs]def set_valid_hold_delay_spiroc2d(spiroc2d_id,value):
"set the delay for the valid_hold signals. *value* is a 6-bit integer"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_valid_hold_delay,set_valid_hold_delay_reg,"valid_hold_delay",value)
# **************************************************************************
# Delay for rst_column signals
# **************************************************************************
def extract_rst_column_delay(spiroc2d):
return str(int(spiroc2d["bitstream_bin"][15:21][::-1],2))
def set_rst_column_delay_reg(spiroc2d,value):
if value!="undef":
return common_roc.apply_inv_mask(spiroc2d,15,common_roc.split_bin(int(value),6))
return 1,"ok"
[docs]def set_rst_column_delay_spiroc2d(spiroc2d_id,value):
"set the delay for the rst_column signals. *value* is a 6-bit integer"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_rst_column_delay,set_rst_column_delay_reg,"rst_column_delay",value)
# **************************************************************************
# ADC ramp slope
# **************************************************************************
# A random string is used to disable the forbidden value 0b10
adc_ramp_slope_strings=["12bit","10bit","X!X!X","8bit"]
def extract_adc_ramp_slope(spiroc2d,xml_value=True):
value=int(spiroc2d["bitstream_bin"][1153:1155],2)
if xml_value:
return adc_ramp_slope_strings[value]
return str(value)
def set_adc_ramp_slope_reg(spiroc2d,value):
if value!="undef":
if value not in adc_ramp_slope_strings:
return 0,"unknown value %s. accepted values are %s"%(value,",".join(adc_ramp_slope_strings))
i=adc_ramp_slope_strings.index(value)
return common_roc.apply_mask(spiroc2d,1153,common_roc.split_bin(i,2))
return 1,"ok"
[docs]def set_adc_ramp_slope_spiroc2d(spiroc2d_id,value):
"Set the ADC ramp slope of a spiroc2d"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_adc_ramp_slope,set_adc_ramp_slope_reg,"adc_ramp_slope",value)
# **************************************************************************
# TDC ramp slope
# **************************************************************************
tdc_ramp_slope_strings=["fast","slow"]
def extract_tdc_ramp_slope(spiroc2d,xml_value=True):
value=int(spiroc2d["bitstream_bin"][234:235],2)
if xml_value:
return tdc_ramp_slope_strings[value]
return str(value)
def set_tdc_ramp_slope_reg(spiroc2d,value):
if value!="undef":
if value not in tdc_ramp_slope_strings:
return 0,"unknown value %s. accepted values are %s"%(value,",".join(tdc_ramp_slope_strings))
i=tdc_ramp_slope_strings.index(value)
return common_roc.apply_mask(spiroc2d,234,common_roc.split_bin(i,1))
return 1,"ok"
[docs]def set_tdc_ramp_slope_spiroc2d(spiroc2d_id,value):
"Set the TDC ramp slope of a spiroc2d"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_tdc_ramp_slope,set_tdc_ramp_slope_reg,"tdc_ramp_slope",value)
# **************************************************************************
# Gain on fast shaper
# **************************************************************************
fs_gain_strings=["high","low"]
def extract_fs_gain(spiroc2d,xml_value=True):
value=int(spiroc2d["bitstream_bin"][819:820],2)
if xml_value:
return fs_gain_strings[value]
return str(value)
def set_fs_gain_reg(spiroc2d,value):
if value!="undef":
if value not in fs_gain_strings:
return 0,"unknown value %s. accepted values are %s"%(value,",".join(fs_gain_strings))
i=fs_gain_strings.index(value)
return common_roc.apply_mask(spiroc2d,819,common_roc.split_bin(i,1))
return 1,"ok"
[docs]def set_fs_gain_spiroc2d(spiroc2d_id,value):
"Set the gain to the fast shaper to high or low"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_fs_gain,set_fs_gain_reg,"fs_gain",value)
# **************************************************************************
# DAC2
# **************************************************************************
def extract_dac2(spiroc2d,xml_value=True):
return spiroc2d["bitstream_bin"][256:257]
[docs]def set_dac2_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) dac2"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_dac2,common_roc.on_off_bit,"dac2",256,value)
# **************************************************************************
# DAC2 PP
# **************************************************************************
def extract_pp_dac2(spiroc2d,xml_value=True):
value=spiroc2d["bitstream_bin"][255:256]
if xml_value:
return common_roc.not_bit(value)
return value
[docs]def set_pp_dac2_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) dac2 power pulsing mode"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_pp_dac2,common_roc.on_off_bit,"pp_dac2",255,value,True)
# **************************************************************************
# Auto gain
# **************************************************************************
def extract_auto_gain(spiroc2d,xml_value=True):
value=spiroc2d["bitstream_bin"][229:230]
if xml_value:
return common_roc.not_bit(value)
return value
[docs]def set_auto_gain_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) auto gain"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_auto_gain,common_roc.on_off_bit,"auto_gain",229,value,True)
# **************************************************************************
# Force gain
# **************************************************************************
forced_gain_strings=["high","low"]
def extract_forced_gain(spiroc2d,xml_value=True):
value=int(spiroc2d["bitstream_bin"][228:229],2)
if xml_value:
return forced_gain_strings[value]
return str(value)
def set_forced_gain_reg(spiroc2d,value):
if value!="undef":
if value not in forced_gain_strings:
return 0,"unknown value %s. accepted values are %s"%(value,",".join(forced_gain_strings))
i=forced_gain_strings.index(value)
return common_roc.apply_mask(spiroc2d,228,common_roc.split_bin(i,1))
return 1,"ok"
[docs]def set_forced_gain_spiroc2d(spiroc2d_id,value):
"Set the forced gain to high or low"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_forced_gain,set_forced_gain_reg,"forced_gain",value)
# **************************************************************************
# TDC
# **************************************************************************
def extract_tdc(spiroc2d,xml_value=True):
value=spiroc2d["bitstream_bin"][226:227]
if xml_value:
return common_roc.not_bit(value)
return value
[docs]def set_tdc_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) TDC"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_tdc,common_roc.on_off_bit,"tdc",226,value,True)
# **************************************************************************
# LVDS NoTrig
# **************************************************************************
def extract_lvds_notrig(spiroc2d,xml_value=True):
return spiroc2d["bitstream_bin"][14:15]
[docs]def set_lvds_notrig_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) LVDS receivers NoTrig"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_lvds_notrig,common_roc.on_off_bit,"lvds_notrig",14,value)
# **************************************************************************
# LVDS ValEvt
# **************************************************************************
def extract_lvds_valevt(spiroc2d,xml_value=True):
return spiroc2d["bitstream_bin"][12:13]
[docs]def set_lvds_valevt_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) LVDS receivers ValEvt"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_lvds_valevt,common_roc.on_off_bit,"lvds_valevt",12,value)
# **************************************************************************
# LVDS TrigExt
# **************************************************************************
def extract_lvds_trigext(spiroc2d,xml_value=True):
return spiroc2d["bitstream_bin"][10:11]
[docs]def set_lvds_trigext_spiroc2d(spiroc2d_id,value):
"Activate (ON or 1) or desactivate (OFF or 0) LVDS receivers TrigExt"
return common_roc.apply_to_roc(spiroc2d_pool,spiroc2d_id,extract_lvds_trigext,common_roc.on_off_bit,"lvds_trigext",10,value)
#********************************** GENERAL PUBLIC FUNCTIONS ***************
[docs]def dump_sc_spiroc2d(spiroc2d_id):
"Returns bitstream of *spiroc2d_id* in binary format"
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
#return the bitstream
bitstream=spiroc2d["bitstream_bin"] if not spiroc2d["missing"] else ""
return 1,bitstream
[docs]def set_missing_spiroc2d(spiroc2d_id,missing):
"Set spiroc2d missing state"
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
spiroc2d["missing"]=1 if missing=="1" else 0
return 1,"ok"
[docs]def explain_sc_spiroc2d(spiroc2d_id):
"Explains the content of a bitsteam in human readable form"
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
if spiroc2d["bitstream"]!="0x%s"%(common_roc.bin2hexa(spiroc2d["bitstream_bin"],msb_padding=False)):
return 0,"invalid hex bitstream"
print("hexa bitstream: ")
print("0x"+spiroc2d["bitstream"].upper())
print("binary bitstream: ")
print("0b"+spiroc2d["bitstream_bin"])
print("gtrigger: %s"%(extract_gtrigger(spiroc2d)))
print("bak sca: %s"%(extract_bak_sca(spiroc2d)))
trigger_delay=int(extract_trigger_delay(spiroc2d))
print("trigger delay: %d(0x%x)"%(trigger_delay,trigger_delay))
valid_hold_delay=int(extract_valid_hold_delay(spiroc2d))
print("valid hold delay: %d(0x%x)"%(valid_hold_delay,valid_hold_delay))
rst_column_delay=int(extract_rst_column_delay(spiroc2d))
print("rst column: %d(0x%x)"%(rst_column_delay,rst_column_delay))
print("chan trig preamp input_dac discri_dac input_dac")
allowed_trigs=extract_allow_trig_chans(spiroc2d).split(",")
if allowed_trigs[0]!="":
allowed_trigs=map(int,allowed_trigs)
enabled_preamps=extract_enable_preamp_chans(spiroc2d).split(",")
if enabled_preamps[0]!="":
enabled_preamps=map(int,enabled_preamps)
enabled_input_dac=extract_enable_input_dac_chans(spiroc2d).split(",")
if enabled_input_dac[0]!="":
enabled_input_dac=map(int,enabled_input_dac)
for channel in range(36):
if channel in allowed_trigs:
print_trig="enabled"
else:
print_trig="disabled"
if channel in enabled_preamps:
print_preamp="enabled"
else:
print_preamp="disabled"
if channel in enabled_input_dac:
print_input_dac="enabled"
else:
print_input_dac="disabled"
print_discri_int=int(extract_discri_dac(spiroc2d,channel))
print_discri_bin=bin(print_discri_int)
print_discri_hex=hex(print_discri_int)
print_input_dac_int=int(extract_input_dac(spiroc2d,channel))
print_input_dac_bin=bin(print_input_dac_int)
print_input_dac_hex=hex(print_input_dac_int)
print("{0:<4d} {1:8s} {2:8s} {3:8s} {4:2s} ({5:6s} {6:3s}) {7:3s} ({8:10s} {9:4s})".format(channel,print_trig,print_preamp,print_input_dac,str(print_discri_int),print_discri_bin,print_discri_hex,str(print_input_dac_int),print_input_dac_bin,print_input_dac_hex))
chipid=extract_chipid(spiroc2d)
print("Chipid in gray: %s"%(chipid))
adc_ramp_slope_xml=extract_adc_ramp_slope(spiroc2d)
adc_ramp_slope_int=int(extract_adc_ramp_slope(spiroc2d,False))
print("ADC ramp slope: %d value=%s"%(adc_ramp_slope_int,adc_ramp_slope_xml))
auto_gain_xml=extract_auto_gain(spiroc2d)
auto_gain_int=int(extract_auto_gain(spiroc2d,False))
print("Auto gain: %d value=%s"%(auto_gain_int,auto_gain_xml))
forced_gain_xml=extract_forced_gain(spiroc2d)
forced_gain_int=int(extract_forced_gain(spiroc2d,False))
print("Forced gain: %d value=%s"%(forced_gain_int,forced_gain_xml))
dac2_gain_select_xml=extract_dac2_gain_select(spiroc2d)
dac2_gain_select_int=int(extract_dac2_gain_select(spiroc2d,False))
print("DAC2 gain select: %d value=%s"%(dac2_gain_select_int,dac2_gain_select_xml))
dac2_xml=extract_dac2(spiroc2d)
dac2_int=int(extract_dac2(spiroc2d,False))
print("DAC2: %d value=%s"%(dac2_int,dac2_xml))
fs_gain_xml=extract_fs_gain(spiroc2d)
fs_gain_int=int(extract_fs_gain(spiroc2d,False))
print("LG PA on FS: %d value=%s"%(fs_gain_int,fs_gain_xml))
lvds_notrig_xml=extract_lvds_notrig(spiroc2d)
lvds_notrig_int=int(extract_lvds_notrig(spiroc2d,False))
print("LVDS NoTrig: %d value=%s"%(lvds_notrig_int,lvds_notrig_xml))
lvds_trigext_xml=extract_lvds_trigext(spiroc2d)
lvds_trigext_int=int(extract_lvds_trigext(spiroc2d,False))
print("LVDS TrigExt: %d value=%s"%(lvds_trigext_int,lvds_trigext_xml))
lvds_valevt_xml=extract_lvds_valevt(spiroc2d)
lvds_valevt_int=int(extract_lvds_valevt(spiroc2d,False))
print("LVDS ValEvt: %d value=%s"%(lvds_valevt_int,lvds_valevt_xml))
pp_dac2_xml=extract_pp_dac2(spiroc2d)
pp_dac2_int=int(extract_pp_dac2(spiroc2d,False))
print("PP DAC2: %d value=%s"%(pp_dac2_int,pp_dac2_xml))
tdc_ramp_slope_xml=extract_tdc_ramp_slope(spiroc2d)
tdc_ramp_slope_int=int(extract_tdc_ramp_slope(spiroc2d,False))
print("TDC ramp slope: %d value=%s"%(tdc_ramp_slope_int,tdc_ramp_slope_xml))
tdc_xml=extract_tdc(spiroc2d)
tdc_int=int(extract_tdc(spiroc2d,False))
print("TDC: %d value=%s"%(tdc_int,tdc_xml))
print("tdc ext: %s"%(extract_tdc_ext(spiroc2d)))
return 1,"ok"
#****************************** PHASES *************************************
[docs]def init_spiroc2d(spiroc2d_id):
"Initialize a spiroc2d"
spiroc2d_pool.new(spiroc2d_id,{"missing":0})
return 1,"ok"
[docs]def deinit_spiroc2d(spiroc2d_id):
"Deinitialize *spiroc2d_id*"
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 1,str(e)
spiroc2d_pool.remove(spiroc2d_id)
return 1,"ok"
[docs]def config_spiroc2d(spiroc2d_id,file,bitstream,gtrigger,allow_trig_chans,disallow_trig_chans,enable_preamp_chans,disable_preamp_chans,enable_input_dac_chans,disable_input_dac_chans,bak_sca,rst_column_delay,tdc_ext,trigger_delay,valid_hold_delay,adc_ramp_slope,auto_gain,forced_gain,dac2_gain_select,dac2,fs_gain,lvds_notrig,lvds_trigext,lvds_valevt,pp_dac2,tdc_ramp_slope,tdc):
"prepare the bitstream for configuring a chip"
try:
spiroc2d=spiroc2d_pool.get(spiroc2d_id)
except Exception as e:
return 0,str(e)
#empty the bitstream
spiroc2d["bitstream_bin"]=""
#load bitstream
if bitstream!="undef":
retcode,res=common_roc.load_str(bitstream,spiroc2d_bs_length)
if retcode==0:
return 0,"cant parse bitstream: %s"%(res)
spiroc2d["bitstream_bin"]=res
#load bitstream from file
if file!="undef":
retcode,res=common_roc.load_file(file,spiroc2d_bs_length)
if retcode==0:
return 0,"cant open config file: %s"%(res)
spiroc2d["bitstream_bin"]=res
if spiroc2d["bitstream_bin"]=="":
return 0,"no bitstream defined for spiroc2d %s"%(spiroc2d_id)
#set chip id
retcode,res=set_chipid(spiroc2d_id,spiroc2d)
if retcode==0:
return 0,"cant set chipid: %s"%(res)
#set global trigger threshold
retcode,res=set_gtrigger_spiroc2d(spiroc2d_id,gtrigger)
if retcode==0:
return 0,"cant set trigger threshold: %s"%(res)
# allows to trigger
retcode,res=allow_trig_chans_spiroc2d(spiroc2d_id,allow_trig_chans)
if retcode==0:
return 0,"cant allow to trigger nomasktrig: %s"%(res)
# disallows to trigger
retcode,res=disallow_trig_chans_spiroc2d(spiroc2d_id,disallow_trig_chans)
if retcode==0:
return 0,"cant disallow to trigger masktrig: %s"%(res)
# enable preamps
retcode,res=enable_preamp_chans_spiroc2d(spiroc2d_id,enable_preamp_chans)
if retcode==0:
return 0,"cant enable preamp: %s"%(res)
# disable preamps
retcode,res=disable_preamp_chans_spiroc2d(spiroc2d_id,disable_preamp_chans)
if retcode==0:
return 0,"cant enable preamp: %s"%(res)
# enable input DAC
retcode,res=enable_input_dac_chans_spiroc2d(spiroc2d_id,enable_input_dac_chans)
if retcode==0:
return 0,"cant enable input DAC: %s"%(res)
# disable input DAC
retcode,res=disable_input_dac_chans_spiroc2d(spiroc2d_id,disable_input_dac_chans)
if retcode==0:
return 0,"cant enable input DAC: %s"%(res)
# set backup SCA
retcode,res=set_bak_sca_spiroc2d(spiroc2d_id,bak_sca)
if retcode==0:
return 0,"cant set backup SCA: %s"%(res)
# set rst_column delay
retcode,res=set_rst_column_delay_spiroc2d(spiroc2d_id,rst_column_delay)
if retcode==0:
return 0,"cant set rst_column delay: %s"%(res)
# set trigger delay
retcode,res=set_trigger_delay_spiroc2d(spiroc2d_id,trigger_delay)
if retcode==0:
return 0,"cant set trigger delay: %s"%(res)
# set valid_hold delay
retcode,res=set_valid_hold_delay_spiroc2d(spiroc2d_id,valid_hold_delay)
if retcode==0:
return 0,"cant set valid_hold delay: %s"%(res)
# set TDC
retcode,res=set_tdc_spiroc2d(spiroc2d_id,tdc)
if retcode==0:
return 0,"cant set TDC: %s"%(res)
# set TDC ramp slope
retcode,res=set_tdc_ramp_slope_spiroc2d(spiroc2d_id,tdc_ramp_slope)
if retcode==0:
return 0,"cant set TDC ramp slope: %s"%(res)
# set TDC ext
retcode,res=set_tdc_ext_spiroc2d(spiroc2d_id,tdc_ext)
if retcode==0:
return 0,"cant set TDC ext: %s"%(res)
# set ADC ramp slope
retcode,res=set_adc_ramp_slope_spiroc2d(spiroc2d_id,adc_ramp_slope)
if retcode==0:
return 0,"cant set ADC ramp slope: %s"%(res)
# set auto gain
retcode,res=set_auto_gain_spiroc2d(spiroc2d_id,auto_gain)
if retcode==0:
return 0,"cant set auto gain: %s"%(res)
# set the forced gain
retcode,res=set_forced_gain_spiroc2d(spiroc2d_id,forced_gain)
if retcode==0:
return 0,"cant set forced gain: %s"%(res)
# set DAC2 gain select
retcode,res=set_dac2_gain_select_spiroc2d(spiroc2d_id,dac2_gain_select)
if retcode==0:
return 0,"cant set DAC2 gain select: %s"%(res)
# set DAC2
retcode,res=set_dac2_spiroc2d(spiroc2d_id,dac2)
if retcode==0:
return 0,"cant set DAC2: %s"%(res)
# set high or low gain PA on fast shaper
retcode,res=set_fs_gain_spiroc2d(spiroc2d_id,fs_gain)
if retcode==0:
return 0,"cant set LG PA on FS: %s"%(res)
# set LVDS receivers NoTrig
retcode,res=set_lvds_notrig_spiroc2d(spiroc2d_id,lvds_notrig)
if retcode==0:
return 0,"cant set LVDS NoTrig: %s"%(res)
# set LVDS receivers TrigExt
retcode,res=set_lvds_trigext_spiroc2d(spiroc2d_id,lvds_trigext)
if retcode==0:
return 0,"cant set LVDS TrigExt: %s"%(res)
# set LVDS receivers ValEvt
retcode,res=set_lvds_valevt_spiroc2d(spiroc2d_id,lvds_valevt)
if retcode==0:
return 0,"cant set LVDS ValEvt: %s"%(res)
# set PP DAC2
retcode,res=set_pp_dac2_spiroc2d(spiroc2d_id,pp_dac2)
if retcode==0:
return 0,"cant set LVDS PP DAC2: %s"%(res)
#update the bitstream in cmod
common_roc.update_bitstream(spiroc2d)
return 1,"ok"
[docs]def get_param_spiroc2d(spiroc2d_id,param_name):
"parameter extraction"
return common_roc.get_param_roc(spiroc2d_pool,spiroc2d_id,param_name)
